Gujarat Technological UniversityWinter 2024 examination

GTU 3130704 Digital Fundamentals (DF) Winter 2024 Question Paper & PDF

B.E. · Computer Engineering · Semester 3 · Subject code 3130704
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Total
70 marks
To pass
23 marks (33%)
Duration
2.5 Hours 10:30 AM – 1:00 PM
Questions
5 with internal choice
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10 of 25 questions on this paper were also asked in other years. 1 more is a type of question GTU sets again with new data. Each is marked below with the years it appeared.See all 31 repeated 3130704 questions, most asked first

Q.1

14 Marks
(a)
3 marks
aPerform the following mathematical operations using 2’s complement method.
i)(9)10 + (-5)10
ii)(3)10 –
8)10
(b)
4 marksAsked in 3 of 6 papers
State and prove De-Morgan’s theorems using truth-tables.

Also asked in Winter 2025 Q2b, Summer 2024 Q1b

(c)
7 marks
Explain the characteristics of Digital ICs.

Q.2

14 Marks
(a)
3 marks
Design a Full Adder circuit using basic logic gates.
(b)
4 marksAsked in 2 of 6 papers
Design a modulo-6 ripple counter using T-Flip-flops.

Also asked in Winter 2025 Q4c

(c)
7 marks
Design a 4-bit Binary to Gray Code Converter using K-map.
(c)
7 marks
Draw a two input TTL NAND gate and explain its operation.

Q.3

14 Marks
(a)
3 marks
Explain Race Around Condition in JK flip flop.
(b)
4 marks
Design a 1 - bit Magnitude Comparator.
(c)
7 marks
Explain Hamming codes for error correction with a suitable example.
(a)
3 marks
Find expression for the following and implement using logic gates.

F(A,B,C,D) = πM(0,2,3,6,7,8,9,12,13)

(b)
4 marksAsked in 3 of 6 papers
Implement D flip flop using JK flip flop.

Also asked in Winter 2025 Q3b, Summer 2025 Q4b OR

(c)
7 marksAsked in 3 of 6 papers
Design a 4-bit twisted Ring Counter using JK flip flops.

Also asked in Summer 2026 Q3a OR, Summer 2023 Q3c

Q.4

14 Marks
(a)
3 marksAsked in 3 of 6 papers
Differentiate Synchronous Counters and Asynchronous Counters.

Also asked in Summer 2026 Q3a, Winter 2025 Q3a OR

(b)
4 marksSame type asked in 2 of 6 papers

Implement the following using 8:1 MUX. F = f(A,B,C,D) = Σm(2,4,5,7,10,14)

Also asked in Summer 2025 Q3b, Summer 2025 Q3b OR

(c)
7 marks
Design a synchronous BCD counter using J-K flip-flops.
(a)
3 marks
Implement full subtractor using 3:8 decoder and write a truth table.
(b)
4 marksAsked in 3 of 6 papers
Explain the specifications of Digital to Analog Converters.

Also asked in Winter 2025 Q4b, Summer 2024 Q5b OR

(c)
7 marksAsked in 4 of 6 papers
Explain Successive Approximation type A/D converter.

Also asked in Summer 2026 Q4a OR, Summer 2025 Q5b OR, Summer 2023 Q4c OR

Q.5

14 Marks
(a)
3 marksAsked in 5 of 6 papers
Differentiate Static RAM and Dynamic RAM.

Also asked in Summer 2026 Q5a OR, Winter 2025 Q5a, Summer 2024 Q4a, Summer 2023 Q5a OR

(b)
4 marksAsked in 4 of 6 papers
Write a short note on FPGA.

Also asked in Summer 2026 Q5b, Winter 2025 Q5c, Summer 2025 Q5a OR

(c)
7 marks
Explain the operation of Dual-slope A/D converter.
(a)
3 marks
Explain basic structure of a CCD (Charge Coupled Device).
(b)
4 marks
Write a short note on Programmable Array Logic.
(c)
7 marksAsked in 4 of 6 papers
Explain various types of Read Only Memory.

Also asked in Summer 2026 Q5a, Winter 2025 Q5c OR, Summer 2024 Q4a OR

More Digital Fundamentals papers

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About this paper

Official Gujarat Technological University (GTU) examination paper for Digital Fundamentals (DF) (Winter 2024, B.E. · Computer Engineering, Sem 3). Features complete 70-mark regular & remedial examination pattern, official marking distribution across all 5 questions, and direct 1-click official PDF download.

Transcribed for student exam preparation from Gujarat Technological University official examination archives. Questions, syllabus guidelines, and curriculum marking schemes remain the intellectual property of Gujarat Technological University.

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