GTU · BE Computer · Semester 3

GTU 3130704 Digital Fundamentals (DF) Old Question Papers PDF

Official Gujarat Technological University (GTU) old question papers PDF (Regular & Remedial) and step-by-step solved questions for Digital Fundamentals (DF) across 2023 – 2026 examinations.

6 papers, 2023 – 202670 marks23 to pass2.5 hours
31 questions GTU asked more than onceAsked in 5 of 6 papers: Differentiate between static RAM (SRAM) and dynamic RAM (DRAM).See list

Exam papers

Most repeated questions

31 questions GTU set in two or more of 6 papers, most repeated first. Tap a year to open that paper at the question.

  1. Differentiate between static RAM (SRAM) and dynamic RAM (DRAM).

    3 marksAsked in 5 of 6 papers

    Summer 2026 Q5a OR Winter 2025 Q5a Winter 2024 Q5a Summer 2024 Q4a Summer 2023 Q5a OR

  2. Design a simple combinational logic function F(A,B,C)=∑m(0,1,2,5,7) and implement it using a Programmable Logic Array (PLA), clearly showing the internal connections.

    7 marksSame type asked in 4 of 6 papers

    Summer 2026 Q5c Summer 2025 Q5c Summer 2024 Q5c Summer 2023 Q5b

  3. Describe the architecture and use of Field Programmable Gate Arrays (FPGAs).

    4 marksAsked in 4 of 6 papers

    Summer 2026 Q5b Winter 2025 Q5c Summer 2025 Q5a OR Winter 2024 Q5b

  4. Describe the operation of a Successive Approximation A/D (SAR) converter and state its main specification regarding conversion time.

    3 marksAsked in 4 of 6 papers

    Summer 2026 Q4a OR Summer 2025 Q5b OR Winter 2024 Q4c OR Summer 2023 Q4c OR

  5. Define Read Only Memory (ROM) and list its different types.

    3 marksAsked in 4 of 6 papers

    Summer 2026 Q5a Winter 2025 Q5c OR Winter 2024 Q5c OR Summer 2024 Q4a OR

  6. Convert the decimal number 163 to its equivalent binary, octal and hexadecimal forms.

    3 marksSame type asked in 4 of 6 papers

    Summer 2026 Q1a Winter 2025 Q1b Summer 2024 Q2b Summer 2023 Q1b

  7. What do you mean by universal gates, and which gates are universal? Convert NAND gate to OR gate. Convert NOR gate to AND gate.

    7 marksAsked in 3 of 6 papers

    Summer 2026 Q1c Summer 2025 Q1c Summer 2023 Q1c

  8. Draw a neat diagram of a 4-bit right shift register and explain its operation

    7 marksAsked in 3 of 6 papers

    Summer 2026 Q3c Summer 2025 Q4c Summer 2023 Q3b

  9. Implement the logic function F(X,Y,Z)=∑m(1,2,4,7) using a ROM as a PLD, showing the memory organization.

    7 marksSame type asked in 3 of 6 papers

    Summer 2026 Q5c OR Summer 2025 Q5b Summer 2023 Q5b OR

  10. State and prove De-Morgan’s theorems using truth-tables.

    4 marksAsked in 3 of 6 papers

    Winter 2025 Q2b Winter 2024 Q1b Summer 2024 Q1b

Show 21 more repeated questionsHide the 21 more
  1. Implement D flip flop using JK flip flop.

    4 marksAsked in 3 of 6 papers

    Winter 2025 Q3b Summer 2025 Q4b OR Winter 2024 Q3b OR

  2. Explain the specification of D/A converter.

    4 marksAsked in 3 of 6 papers

    Winter 2025 Q4b Winter 2024 Q4b OR Summer 2024 Q5b OR

  3. Explain R-2R ladder type D/A converter.

    4 marksAsked in 3 of 6 papers

    Winter 2025 Q5b OR Summer 2024 Q5b Summer 2023 Q4c

  4. Analyze the conditions for a 'Don't Care' term in K-map simplification and simplify the expression F(W,X,Y,Z)=∑m(1,3,7,11,15) with Don't Care d(W,X,Y,Z)=∑d(0,2,5).

    4 marksSame type asked in 3 of 6 papers

    Summer 2026 Q2b Summer 2024 Q3b OR Summer 2023 Q2b

  5. Distinguish between synchronous and asynchronous (ripple) counters based on their clocking mechanism.

    3 marksAsked in 3 of 6 papers

    Summer 2026 Q3a Winter 2025 Q3a OR Winter 2024 Q4a

  6. Design half subtractor logic circuit.

    3 marksAsked in 3 of 6 papers

    Winter 2025 Q3a Summer 2025 Q3a OR Summer 2023 Q2a

  7. Analyze the state transition diagram for a Johnson (twisted ring) counter and explain its counting sequence for 4 flip-flops.

    3 marksAsked in 3 of 6 papers

    Summer 2026 Q3a OR Winter 2024 Q3c OR Summer 2023 Q3c

  8. Implement AND, OR, EX-OR gates using NAND & NOR gates.

    7 marksAsked in 2 of 6 papers

    Winter 2025 Q1c Summer 2024 Q1c

  9. Implement a 4×16 decoder using two 3×8 decoders.

    7 marksAsked in 2 of 6 papers

    Summer 2026 Q2c OR Winter 2025 Q4b OR

  10. Design 2 - Bit Magnitude Comparator.

    7 marksAsked in 2 of 6 papers

    Winter 2025 Q3c Summer 2024 Q3c

  11. Design 3-bit even parity generator circuit.

    7 marksAsked in 2 of 6 papers

    Winter 2025 Q2c Summer 2024 Q3c OR

  12. Design a Combinational circuit that convert Binary to BCD code converter.

    7 marksAsked in 2 of 6 papers

    Winter 2025 Q3c OR Summer 2024 Q2c

  13. Design a Combinational circuit that convert BCD to Excess 3 code converter.

    7 marksAsked in 2 of 6 papers

    Summer 2024 Q2c OR Summer 2023 Q2c

  14. Design mod-6 asynchronous counter using T flip flop.

    7 marksAsked in 2 of 6 papers

    Winter 2025 Q4c Winter 2024 Q2b

  15. Design a 3-bit synchronous up counter using JK flip-flops.

    7 marksAsked in 2 of 6 papers

    Winter 2025 Q4c OR Summer 2023 Q3c OR

  16. Describe the concept of memory organization in semiconductor memories

    4 marksAsked in 2 of 6 papers

    Summer 2026 Q5b OR Summer 2023 Q5c

  17. Implement the following Boolean function using 8:1 multiplexer: F(A, B, C, D) = A’BD’ + ACD + A’C’ D +B’CD

    4 marksSame type asked in 2 of 6 papers

    Summer 2025 Q3b Summer 2025 Q3b OR Winter 2024 Q4b

  18. List out various logic families. Also list characteristics of digital IC.

    3 marksAsked in 2 of 6 papers

    Winter 2025 Q1a Summer 2024 Q1a

  19. List out and explain any one application of the register.

    3 marksAsked in 2 of 6 papers

    Winter 2025 Q4a OR Summer 2025 Q4a OR

  20. Explain classification of Memories.

    3 marksAsked in 2 of 6 papers

    Winter 2025 Q5a OR Summer 2025 Q5c OR

  21. Design the combinational circuit of 4 Bit Parallel Adder.

    3 marksAsked in 2 of 6 papers

    Summer 2025 Q3a Summer 2024 Q3b

Which branches take this subject

GTU's syllabus lists 3130704 for 11 branches. One set of papers serves all of them.

Semester 3: 11 branches

Artificial Intelligence and Data Science, Artificial Intelligence and Machine Learning, Computer Engineering, Computer Science & Design, Computer Science & Engineering, Computer Science & Engineering (Artificial Intelligence and Machine Learning), Computer Science & Engineering (Cyber Security), Computer Science & Engineering (Data Science), Computer Science & Engineering (Internet of Things and Cyber Security Including Block Chain Technology), Information & Communication Technology, Information Technology

Other Semester 3 subjects

Common questions

Are these GTU 3130704 Digital Fundamentals papers valid for both Regular and Remedial exams?

Yes. Gujarat Technological University (GTU) follows the same 70-mark syllabus, exam blueprint, and 23-mark passing cutoff for both Regular and Remedial (ATKT/backlog) examinations. All 6 past exam sessions (2023 – 2026) serve as comprehensive preparation for either attempt.

How can I download GTU 3130704 Digital Fundamentals old question papers PDF?

You can download official GTU 3130704 original question paper PDFs directly from the table above with 1 click and zero deceptive ads or wait timers. Every paper also includes interactive online questions with AI study prompts.

What is the passing mark for GTU Digital Fundamentals (3130704)?

The external theory exam carries 70 marks. The minimum passing cutoff is 23 marks (33%). Exam duration is 2.5 hours.

What is the GTU exam pattern for 3130704?

The examination contains 5 main questions of 14 marks each, totaling 70 marks. Questions 2 through 5 provide internal OR choices, typically split into 3-mark, 4-mark, and 7-mark questions.