Q.1
14 Marks(a)
List out various logic families. Also list characteristics of digital IC.
Also asked in Winter 2025 Q1a
(b)
State and prove De-Morgan’s theorems using truth-tables.
Also asked in Winter 2025 Q2b, Winter 2024 Q1b
Gujarat Technological UniversitySummer 2024 examination
GTU 3130704 Digital Fundamentals (DF) Summer 2024 Question Paper & PDF
B.E. · Computer Engineering · Semester 3 · Subject code 3130704
- Total
- 70 marks
- To pass
- 23 marks (33%)
- Duration
- 2.5 Hours 10:30 AM – 1:00 PM
- Questions
- 5 with internal choice
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12 of 25 questions on this paper were also asked in other years. 3 more are types of question GTU sets again with new data. Each is marked below with the years it appeared.See all 31 repeated 3130704 questions, most asked first
Q.2
14 Marks(a)
Reduce the expression F = x’y’z +yz+ xz
(b)
Convert the decimal Number 330.5 to base 4 and base 8.
Also asked in Summer 2026 Q1a, Winter 2025 Q1b, Summer 2023 Q1b
(c)
Design a Combinational circuit that convert Binary to BCD code converter.
Also asked in Winter 2025 Q3c OR
OR
(c)
Design a Combinational circuit that convert BCD to Excess 3 code converter.
Also asked in Summer 2023 Q2c
Q.3
14 Marks(a)
Minimize following Boolean function using K-map: Y(A,B,C,D) = Σ m(0, 1, 3, 5,6, 7, 10, 13,14, 15)
OR
(a)
Design D FF using SR FF. Write truth table of D FF.
(b)
Minimize following Boolean function using K-map: F(A,B,C,D) = Σ m(1, 5, 6, 12, 13, 14) + d(2, 4)
Also asked in Summer 2026 Q2b, Summer 2023 Q2b
Q.4
14 Marks(a)
Compare static RAM and dynamic RAM.
Also asked in Summer 2026 Q5a OR, Winter 2025 Q5a, Winter 2024 Q5a, Summer 2023 Q5a OR
(b)
Explain JK flip flop with its characteristic table and excitation table.
(c)
Write a brief note on race around condition and its solution. Draw & explain the logic diagram of master-slave JK flip-flop.
OR
(b)
Explain Look-ahead Carry generator
(c)
Design a Synchronous counter with the following binary sequence: 0, 1, 3, 4,5, 7 and repeat. Use T – flip-flops
Q.5
14 Marks(a)
Explain the working of a Counter.
(c)
A combinational circuit is defined by the function F1 (A, B, C,) = Σ m (0,1,3,4) F2 (A, B, C,) = Σ m (1.2.3,4,5) Implement the circuit with a PLA having 3 inputs, 3 product term & 2 outputs.
Also asked in Summer 2026 Q5c, Summer 2025 Q5c, Summer 2023 Q5b
OR
(a)
Explain the working of SISO shift register.
(c)
Describe operation of D/A converter with binary-weighted resisters
More Digital Fundamentals papers
Questions repeat across sessions. Working through two or three papers shows you which topics GTU asks most.
Other Semester 3 subjects
BE Computer
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About this paper
Official Gujarat Technological University (GTU) examination paper for Digital Fundamentals (DF) (Summer 2024, B.E. · Computer Engineering, Sem 3). Features complete 70-mark regular & remedial examination pattern, official marking distribution across all 5 questions, and direct 1-click official PDF download.
Transcribed for student exam preparation from Gujarat Technological University official examination archives. Questions, syllabus guidelines, and curriculum marking schemes remain the intellectual property of Gujarat Technological University.