Gujarat Technological UniversitySummer 2025 examination

GTU 3130704 Digital Fundamentals (DF) Summer 2025 Question Paper & PDF

B.E. · Computer Engineering · Semester 3 · Subject code 3130704
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Total
70 marks
To pass
23 marks (33%)
Duration
2.5 Hours 2:30 PM – 5:00 PM
Questions
5 with internal choice
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9 of 25 questions on this paper were also asked in other years. 4 more are types of question GTU sets again with new data. Each is marked below with the years it appeared.See all 31 repeated 3130704 questions, most asked first

Q.1

14 Marks
(a)
3 marks
State and Apply DeMorgan’s theorem.: [(x+y)’+(x+y)’]’=x+y
(b)
4 marks
Do As Directed:
1Convert (0.6875)10 to Binary.
2Give the octal equivalent of hexadecimal numbers of DC.BA.
3Convert (101101.1101)2 to Hexadecimal.
4Give the Truth Table of XOR gate.
(c)
7 marksAsked in 3 of 6 papers
Prove that NAND and NOR gates are universal gates.

Also asked in Summer 2026 Q1c, Summer 2023 Q1c

Q.2

14 Marks
(a)
3 marks
Determine the value of base x if (211)x = (152)8
(b)
4 marks
Subtract (111001)2 from (101011)2 using 1’s complement
(c)
7 marks

Simplify and implementation the following SOP function using NOR gates F(A,B,C,D)= ∑m(0,1,4,5,10,11,14,15)

(c)
7 marks

Simplify the Boolean expression using K-map and implement using NAND gates F(A,B,C,D) = ∑m(0,2,3,8,10,11,12,14)

Q.3

14 Marks
(a)
3 marksAsked in 2 of 6 papers
Design the combinational circuit of 4 Bit Parallel Adder.

Also asked in Summer 2024 Q3b

(b)
4 marksSame type asked in 2 of 6 papers
Implement the following Boolean function using 8:1 multiplexer:

F(A, B, C, D) = A’BD’ + ACD + A’C’ D +B’CD

Also asked in Winter 2024 Q4b

(c)
7 marks

Design a combinational circuit with four input lines that represent a decimal digit in BCD and four output lines that generate the 9’s complement of the input digit.

(a)
3 marksAsked in 3 of 6 papers

Design Truth table for the Half adder and write the expression for the sum and carry.

Also asked in Winter 2025 Q3a, Summer 2023 Q2a

(b)
4 marksSame type asked in 2 of 6 papers
Implement the following Boolean function using 8:1 multiplexer:

F(A,B,C,D) = Σ𝑚 (0,3,4,7,8,9,13,14)

Also asked in Winter 2024 Q4b

(c)
7 marks

Design 5 to 32 line decoder using 3 to 8 line decoder and 2 to 4 line decoder.

Q.4

14 Marks
(a)
3 marks
Explain about Ring counter.
(b)
4 marks
Describe how T flip-flop is converted into D flip-flop.
(c)
7 marksAsked in 3 of 6 papers

What is the function of shift register? With the help of simple diagram explain its working.

Also asked in Summer 2026 Q3c, Summer 2023 Q3b

(a)
3 marksAsked in 2 of 6 papers
Explain various applications of the register.

Also asked in Winter 2025 Q4a OR

(b)
4 marksAsked in 3 of 6 papers
Describe how JK flip-flop is converted into D flip-flop.

Also asked in Winter 2025 Q3b, Winter 2024 Q3b OR

(c)
7 marks

Draw the state diagram of BCD ripple counter, develop its logic diagram and explain its operation.

Q.5

14 Marks
(a)
3 marks
Write difference between PROM, PLA & PAL.
(b)
4 marksSame type asked in 3 of 6 papers

Using 8x4 ROM, realize the expressions W(A,B,C) =∑m(0,1,3,5,7) ,X(A,B,C) =∑m(0,2,4,5) , Y(A,B,C) =∑m(1,2,4,7) , Z(A,B,C=∑m(0,3,5,6,7). Show the data at address 2 & 6.

Also asked in Summer 2026 Q5c OR, Summer 2023 Q5b OR

(c)
7 marksSame type asked in 4 of 6 papers

Implement the following function using PLA F1= ∑m(0,2,5,8,9,11),F2=∑m(1,3,8,10,13,15),F3=∑m(0,1,5,7,9,12,14).

Also asked in Summer 2026 Q5c, Summer 2024 Q5c, Summer 2023 Q5b

(a)
3 marksAsked in 4 of 6 papers
Discuss : Field Programmable Gate Array (FPGA)

Also asked in Summer 2026 Q5b, Winter 2025 Q5c, Winter 2024 Q5b

(b)
4 marksAsked in 4 of 6 papers
Explain Successive Approximation type A/D converter.

Also asked in Summer 2026 Q4a OR, Winter 2024 Q4c OR, Summer 2023 Q4c OR

(c)
7 marksAsked in 2 of 6 papers
Give a brief on various types of memories.

Also asked in Winter 2025 Q5a OR

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About this paper

Official Gujarat Technological University (GTU) examination paper for Digital Fundamentals (DF) (Summer 2025, B.E. · Computer Engineering, Sem 3). Features complete 70-mark regular & remedial examination pattern, official marking distribution across all 5 questions, and direct 1-click official PDF download.

Transcribed for student exam preparation from Gujarat Technological University official examination archives. Questions, syllabus guidelines, and curriculum marking schemes remain the intellectual property of Gujarat Technological University.

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