Simplify and implementation the following SOP function using NOR gates F(A,B,C,D)= ∑m(0,1,4,5,10,11,14,15)
Simplify the Boolean expression using K-map and implement using NAND gates F(A,B,C,D) = ∑m(0,2,3,8,10,11,12,14)
F(A, B, C, D) = A’BD’ + ACD + A’C’ D +B’CD
Design a combinational circuit with four input lines that represent a decimal digit in BCD and four output lines that generate the 9’s complement of the input digit.
Design Truth table for the Half adder and write the expression for the sum and carry.
F(A,B,C,D) = Σ𝑚 (0,3,4,7,8,9,13,14)
Design 5 to 32 line decoder using 3 to 8 line decoder and 2 to 4 line decoder.
What is the function of shift register? With the help of simple diagram explain its working.
Draw the state diagram of BCD ripple counter, develop its logic diagram and explain its operation.
Using 8x4 ROM, realize the expressions W(A,B,C) =∑m(0,1,3,5,7) ,X(A,B,C) =∑m(0,2,4,5) , Y(A,B,C) =∑m(1,2,4,7) , Z(A,B,C=∑m(0,3,5,6,7). Show the data at address 2 & 6.
Implement the following function using PLA F1= ∑m(0,2,5,8,9,11),F2=∑m(1,3,8,10,13,15),F3=∑m(0,1,5,7,9,12,14).
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Official Gujarat Technological University (GTU) examination paper and step-by-step solutions for Digital Fundamentals (DF) (Summer 2025, B.E. · Computer Engineering, Sem 3). Features complete 70-mark regular & remedial examination pattern, official marking distribution across all 5 questions, and direct 1-click official PDF download.
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