Gujarat Technological UniversitySummer 2023 examination

GTU 3130704 Digital Fundamentals (DF) Summer 2023 Question Paper & PDF

B.E. · Computer Engineering · Semester 3 · Subject code 3130704
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Total
70 marks
To pass
23 marks (33%)
Duration
2.5 Hours 2:30 PM – 5:00 PM
Questions
5 with internal choice
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10 of 25 questions on this paper were also asked in other years. 4 more are types of question GTU sets again with new data. Each is marked below with the years it appeared.See all 31 repeated 3130704 questions, most asked first

Q.1

14 Marks
(a)
3 marks
Define the logic family properties:
i)fan in
ii)propagation delay
iii)power dissipation
(b)
4 marksSame type asked in 4 of 6 papers
Convert the following number to the given base:
i)(62)10 = (?)2 = (?)8
ii)(AFB)16 = (?)2 = (?)8

Also asked in Summer 2026 Q1a, Winter 2025 Q1b, Summer 2024 Q2b

(c)
7 marksAsked in 3 of 6 papers

Why NAND and NOR gates are called universal gates? Explain with appropriate example.

Also asked in Summer 2026 Q1c, Summer 2025 Q1c

Q.2

14 Marks
(a)
3 marksAsked in 3 of 6 papers
Explain the half subtractor with logic circuit.

Also asked in Winter 2025 Q3a, Summer 2025 Q3a OR

(b)
4 marksSame type asked in 3 of 6 papers

Minimized the boolean expression using K-map f (A, B, C, D) = ∑m (0, 1, 5, 6, 7, 8, 9) + d(10, 11, 12, 13, 14,

15

Also asked in Summer 2026 Q2b, Summer 2024 Q3b OR

(c)
7 marksAsked in 2 of 6 papers
Design BCD to excess-3 converter.

Also asked in Summer 2024 Q2c OR

(c)
7 marks

Design a circuit which compare two binary number whether A>B, A=B or A

Q.3

14 Marks
(a)
3 marks
Draw the circuit of a J-K flip-flop.
(b)
4 marksAsked in 3 of 6 papers

Describe the operation of a shift register with suitable diagram.

Also asked in Summer 2026 Q3c, Summer 2025 Q4c

(c)
7 marksAsked in 3 of 6 papers

Design the four bit Johnson counter and explain the operation.

Also asked in Summer 2026 Q3a OR, Winter 2024 Q3c OR

(a)
3 marks
Explain different methods of Triggering of flip-flop.
(b)
4 marks

What are qualitative differences between parallel loading and serial loading in shift registers?

(c)
7 marksAsked in 2 of 6 papers
Design a 3 bit synchronous counter using JK flip flop.

Also asked in Winter 2025 Q4c OR

Q.4

14 Marks
(a)
3 marks
How can we describe the resolution of a D/A converter?
(b)
4 marks

A 10-bit D/A converter provides an analog output which has a maximum value of 10.23 volts. Find the resolution of this D/A converter.

(c)
7 marksAsked in 3 of 6 papers
Explain the working of R-2R ladder type D/A converter.

Also asked in Winter 2025 Q5b OR, Summer 2024 Q5b

(a)
3 marks
Explain the types of A/D convertors.
(b)
4 marks

A 10-bit D/A converter has a step-size of 10 mV. Determine the full-scale output voltage and the percentage resolution.

(c)
7 marksAsked in 4 of 6 papers

Describe the successive approximation A/D conversion principle with the neat diagram, explain this type of A/D converter.

Also asked in Summer 2026 Q4a OR, Summer 2025 Q5b OR, Winter 2024 Q4c OR

Q.5

14 Marks
(a)
3 marks
Draw and explain the structure of a RAM cell.
(b)
4 marksSame type asked in 4 of 6 papers

Implement using PLA f1 = ∑m(0, 3, 4,

7)f2 = ∑m(3, 5, 6,
7)

Also asked in Summer 2026 Q5c, Summer 2025 Q5c, Summer 2024 Q5c

(c)
7 marksAsked in 2 of 6 papers

Discuss in brief semiconductor memory organization and its operation.

Also asked in Summer 2026 Q5b OR

(a)
3 marksAsked in 5 of 6 papers
Compare the SRAMs and DRAMs.

Also asked in Summer 2026 Q5a OR, Winter 2025 Q5a, Winter 2024 Q5a, Summer 2024 Q4a

(b)
4 marksSame type asked in 3 of 6 papers

Implement the following Boolean expressions using a PROM. f1 (x2, x1, x0) =  m (0, 1, 2, 5,

7)f2 (x2, x1, x0) =  m (1, 2, 4,
6)

Also asked in Summer 2026 Q5c OR, Summer 2025 Q5b

(c)
7 marks

What is a programmable LOGIC Array (PLA)? Describe with a logic diagram the principle of operation of a PLA. What are its advantages?

More Digital Fundamentals papers

Questions repeat across sessions. Working through two or three papers shows you which topics GTU asks most.

Summer 202670 marks · 5 questions
Winter 202570 marks · 5 questions
Summer 202570 marks · 5 questions
Winter 202470 marks · 5 questions

Other Semester 3 subjects

BE Computer

130001
Mathematics-III
3130004
Effective Technical Communication
3130006
Probability and Statistics
3130702
Data Structures

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About this paper

Official Gujarat Technological University (GTU) examination paper for Digital Fundamentals (DF) (Summer 2023, B.E. · Computer Engineering, Sem 3). Features complete 70-mark regular & remedial examination pattern, official marking distribution across all 5 questions, and direct 1-click official PDF download.

Transcribed for student exam preparation from Gujarat Technological University official examination archives. Questions, syllabus guidelines, and curriculum marking schemes remain the intellectual property of Gujarat Technological University.

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