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Gujarat Technological UniversitySummer 2023 Examination

GTU 3130704 Digital Fundamentals (DF) Summer 2023 Paper Solution & PDF

B.E. · Computer Engineering · Semester 3 · Subject Code: 3130704
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Total Marks70 MarksExternal theory exam
Passing Marks23 Marks33% minimum cutoff
Exam Duration2.5 Hours2:30 PM – 5:00 PM
Paper Structure5 QuestionsWith internal OR choices
Jump toQ1Q2Q3Q4Q5

Question 1

14 MarksMedium
(a)
Define the logic family properties:
i)fan in
ii)propagation delay
iii)power dissipation
3 Marks
(b)
Convert the following number to the given base:
i)(62)10 = (?)2 = (?)8
ii)(AFB)16 = (?)2 = (?)8
4 Marks
(c)

Why NAND and NOR gates are called universal gates? Explain with appropriate example.

7 Marks

Question 2

14 MarksMedium
(a)
Explain the half subtractor with logic circuit.
3 Marks
(b)

Minimized the boolean expression using K-map f (A, B, C, D) = ∑m (0, 1, 5, 6, 7, 8, 9) + d(10, 11, 12, 13, 14,

15
4 Marks
(c)
Design BCD to excess-3 converter.
7 Marks
OR OPTION
(c)

Design a circuit which compare two binary number whether A>B, A=B or A

7 Marks

Question 3

14 MarksMedium
(a)
Draw the circuit of a J-K flip-flop.
3 Marks
(b)

Describe the operation of a shift register with suitable diagram.

4 Marks
(c)

Design the four bit Johnson counter and explain the operation.

7 Marks
OR OPTION
(a)
Explain different methods of Triggering of flip-flop.
3 Marks
(b)

What are qualitative differences between parallel loading and serial loading in shift registers?

4 Marks
(c)
Design a 3 bit synchronous counter using JK flip flop.
7 Marks

Question 4

14 MarksMedium
(a)
How can we describe the resolution of a D/A converter?
3 Marks
(b)

A 10-bit D/A converter provides an analog output which has a maximum value of 10.23 volts. Find the resolution of this D/A converter.

4 Marks
(c)
Explain the working of R-2R ladder type D/A converter.
7 Marks
OR OPTION
(a)
Explain the types of A/D convertors.
3 Marks
(b)

A 10-bit D/A converter has a step-size of 10 mV. Determine the full-scale output voltage and the percentage resolution.

4 Marks
(c)

Describe the successive approximation A/D conversion principle with the neat diagram, explain this type of A/D converter.

7 Marks

Question 5

14 MarksMedium
(a)
Draw and explain the structure of a RAM cell.
3 Marks
(b)

Implement using PLA f1 = ∑m(0, 3, 4,

7)f2 = ∑m(3, 5, 6,
7)
4 Marks
(c)

Discuss in brief semiconductor memory organization and its operation.

7 Marks
OR OPTION
(a)
Compare the SRAMs and DRAMs.
3 Marks
(b)

Implement the following Boolean expressions using a PROM. f1 (x2, x1, x0) =  m (0, 1, 2, 5,

7)f2 (x2, x1, x0) =  m (1, 2, 4,
6)
4 Marks
(c)

What is a programmable LOGIC Array (PLA)? Describe with a logic diagram the principle of operation of a PLA. What are its advantages?

7 Marks
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About this Examination Paper & Attribution

Official Gujarat Technological University (GTU) examination paper and step-by-step solutions for Digital Fundamentals (DF) (Summer 2023, B.E. · Computer Engineering, Sem 3). Features complete 70-mark regular & remedial examination pattern, official marking distribution across all 5 questions, and direct 1-click official PDF download.

Transcribed for student exam preparation from Gujarat Technological University official examination archives. Questions, syllabus guidelines, and curriculum marking schemes remain the intellectual property of Gujarat Technological University.

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