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Gujarat Technological UniversityWinter 2025 Examination

GTU 3140707 Computer Organization & Architecture (COA) Winter 2025 Paper Solution & PDF

B.E. · Computer Engineering · Semester 4 · Subject Code: 3140707
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Total Marks70 MarksExternal theory exam
Passing Marks23 Marks33% minimum cutoff
Exam Duration2.5 Hours2:30 PM – 5:00 PM
Paper Structure5 QuestionsWith internal OR choices
Jump toQ1Q2Q3Q4Q5

Question 1

14 MarksMedium
(a)
Explain following terms in brief.
1Effective address 2. BSA instruction 3. Micro-operation
3 Marks
(b)
Explain any two shift micro-operations with examples.
4 Marks
(c)

What is an assembler? Explain basic computer’s assembler with flow charts.

7 Marks

Question 2

14 MarksMedium
(a)
Differentiate RISC and CISC architecture.
3 Marks
(b)
Explain 5-stage instruction pipeline with example.
4 Marks
(c)
Describe the control unit of the basic computer with block diagram.
7 Marks
OR OPTION
(c)
What is an interrupt? Explain interrupt cycle with flowchart.
7 Marks

Question 3

14 MarksMedium
(a)

Write the Flynn’s classification of parallel processing and briefly explain any one class.

3 Marks
(b)
Draw a 4-bit incrementer circuit using full adder.
4 Marks
(c)
Explain any seven addressing modes with appropriate example.
7 Marks
OR OPTION
(a)
List all the major difficulties in pipeline and briefly explain any one
3 Marks
(b)
Explain address sequencing in the micro programmed control unit
4 Marks
(c)

Write the importance of the overlapped register window? Compute window size and total number of register for following window organization. Number of window=4, Global register =5, local register in each window= 5 and common register to two window = 3.

7 Marks

Question 4

14 MarksMedium
(a)
Briefly explain the Daisy-Chaining priority.
3 Marks
(b)
Write short note on the DMA.
4 Marks
(c)
Explain the booth’s algorithm with an appropriate example.
7 Marks
OR OPTION
(a)
Explain source-initiated asynchronous data transfer using handshaking.
3 Marks
(b)
Write short note on the input-output processor.
4 Marks
(c)
Draw and explain flow chart for the floating point multiplication.
7 Marks

Question 5

14 MarksMedium
(a)

What is the cache coherence? What is the solution to cache coherence problem?

3 Marks
(b)
Compare tightly coupled and loosely coupled multiprocessors.
4 Marks
(c)
List various cache mappings. Explain any one in detail.
7 Marks
OR OPTION
(a)
What are the characteristics of multiprocessors?
3 Marks
(b)
Explain the 8 * 8 omega switching network with diagram.
4 Marks
(c)
Why is the virtual memory? Explain the address mapping in detail.
7 Marks
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About this Examination Paper & Attribution

Official Gujarat Technological University (GTU) examination paper and step-by-step solutions for Computer Organization & Architecture (COA) (Winter 2025, B.E. · Computer Engineering, Sem 4). Features complete 70-mark regular & remedial examination pattern, official marking distribution across all 5 questions, and direct 1-click official PDF download.

Transcribed for student exam preparation from Gujarat Technological University official examination archives. Questions, syllabus guidelines, and curriculum marking schemes remain the intellectual property of Gujarat Technological University.

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