Q.1
14 MarksShow different ways to represent fixed-point positive integers including zero.
Explain using flowchart the working of Booth’s multiplication algorithm of signed-2’s complement numbers.
Also asked in Summer 2026 Q5b OR, Winter 2025 Q4c
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6 of 25 questions on this paper were also asked in other years. Each is marked below with the years it appeared.See all 37 repeated 3140707 questions, most asked first
Show different ways to represent fixed-point positive integers including zero.
Explain using flowchart the working of Booth’s multiplication algorithm of signed-2’s complement numbers.
Also asked in Summer 2026 Q5b OR, Winter 2025 Q4c
Also asked in Winter 2025 Q3b OR, Summer 2025 Q4a OR, Winter 2024 Q3b
Explain the concept of Address Translation and working of the Translation Look-Aside Buffer.
Also asked in Summer 2024 Q4c OR
Apply BUN instruction in assembly program that needs to use a looped sub- routine to check a flag.
Apply the combinational circuits to design a 4-bit adder/subtracter circuit which performs subtraction using 2’s complement.
Also asked in Winter 2024 Q2a
Calculate and show the number of clock cycles required to execute BSA instruction.
Write assembly program for the arithmetic shift-left operation on a number stored in register B. Stop the program in case of overflow.
What is the fundamental difference between a subroutine call and an interrupt request? Analyze the possibility of common memory stack for both.
Write a program in assembly language to multiply two numbers in registers B and C in case the processor has only ADD instruction.
A subroutine return address can be stored in an index register instead of a stack. Analyze the advantages and disadvantages of both configurations.
A RAM operates with 8-bit data bus, 2 chip select lines and 7-bit address lines. Calculate the number of such RAM chips required to have 512 bytes of main memory.
An address space is specified by 24 bits and the corresponding memory space by 16 bits. How many words are there in the address space and in the memory space?
Discuss various Dynamic Arbitration Algorithms for Interprocessor Arbitration.
Calculate the size of a ROM chip which operates using 8-bit data bus, two chip select lines and 9-bit address bus.
How many 128 x 8 RAM chips are needed to provide a memory capacity of 4096 bytes?
Also asked in Winter 2024 Q5c
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Official Gujarat Technological University (GTU) examination paper for Computer Organization & Architecture (COA) (Winter 2023, B.E. · Computer Engineering, Sem 4). Features complete 70-mark regular & remedial examination pattern, official marking distribution across all 5 questions, and direct 1-click official PDF download.
Transcribed for student exam preparation from Gujarat Technological University official examination archives. Questions, syllabus guidelines, and curriculum marking schemes remain the intellectual property of Gujarat Technological University.
3140707 Computer Organization & Architecture
Official GTU PDF · Winter 2023
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