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Gujarat Technological UniversityWinter 2024 Examination

GTU 3140707 Computer Organization & Architecture (COA) Winter 2024 Paper Solution & PDF

B.E. · Computer Engineering · Semester 4 · Subject Code: 3140707
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Total Marks70 MarksExternal theory exam
Passing Marks23 Marks33% minimum cutoff
Exam Duration2.5 Hours2:30 PM – 5:00 PM
Paper Structure5 QuestionsWith internal OR choices
Jump toQ1Q2Q3Q4Q5

Question 1

14 MarksMedium
(a)

Explain signed representation of integer in computer. Write (–12)10 in binary with 8 – bits using following representations

i)Signed magnitude
ii)Signed 1’s complement
iii)Signed 2’s complement
3 Marks
(b)

List all registers used in ‘Basic Computer’ including their symbolic name, size and functionality.

4 Marks
(c)
Explain memory reference instructions of ‘Basic Computer’.
7 Marks

Question 2

14 MarksMedium
(a)
Draw block diagram for 4-bit adder – subtractor.
3 Marks
(b)
Write an assembly language program to add 50 numbers using a loop.
4 Marks
(c)
Explain register stack and memory stack organizations.
7 Marks
OR OPTION
(c)

Write three address and two address instructions program for the following arithmetic expression. Discuss advantages and limitations of both types of programs. X = (A * B / C) + (D / E)

7 Marks

Question 3

14 MarksMedium
(a)
List and explain conflicts that occur in an instruction pipeline.
3 Marks
(b)
Briefly explain address sequencing in microprogrammed control unit.
4 Marks
(c)
Differentiate RISC and CISC.
7 Marks
OR OPTION
(a)
Write a short note on SIMD array processor.
3 Marks
(b)
Explain Fetch subroutine of microprogrammed control.
4 Marks
(c)

Explain addition and subtraction with signed magnitude data. Also list hardware required for the same.

7 Marks

Question 4

14 MarksMedium
(a)
Explain any three addressing modes with suitable example.
3 Marks
(b)
Differentiate isolated I/O and memory mapped I/O
4 Marks
(c)

Explain associative, set-associative and direct mapping of cache memory.

7 Marks
OR OPTION
(a)
Explain functionality of flags used in ‘Basic Computer’.
3 Marks
(b)

What is handshaking? Explain source initiated data transfer using handshaking with neat diagram.

4 Marks
(c)
Write a short note on virtual memory.
7 Marks

Question 5

14 MarksMedium
(a)
Differentiate static RAM and Dynamic RAM.
3 Marks
(b)
Write a short note on daisy chain priority interrupt.
4 Marks
(c)
Explain any three multiprocessor interconnection structures.
7 Marks
OR OPTION
(a)

Differentiate tightly coupled and loosely coupled multiprocessor systems.

3 Marks
(b)
Write a short note on content addressable memory.
4 Marks
(c)
Discuss cache coherence problem and its solutions.
7 Marks
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About this Examination Paper & Attribution

Official Gujarat Technological University (GTU) examination paper and step-by-step solutions for Computer Organization & Architecture (COA) (Winter 2024, B.E. · Computer Engineering, Sem 4). Features complete 70-mark regular & remedial examination pattern, official marking distribution across all 5 questions, and direct 1-click official PDF download.

Transcribed for student exam preparation from Gujarat Technological University official examination archives. Questions, syllabus guidelines, and curriculum marking schemes remain the intellectual property of Gujarat Technological University.

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