Gujarat Technological UniversitySummer 2023 Examination

GTU 3140707 Computer Organization & Architecture (COA) Summer 2023 Paper Solution & PDF

B.E. · Computer Engineering · Semester 4 · Subject Code: 3140707
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Total Marks70 MarksExternal theory exam
Passing Marks23 Marks33% minimum cutoff
Exam Duration2.5 Hours10:30 AM – 1:00 PM
Paper Structure5 QuestionsWith internal OR choices
Jump toQ1Q2Q3Q4Q5

Question 1

14 MarksMedium
(a)
Write the name of basic computer registers with their functionalities.
3 Marks
(b)
Discuss 4-bit binary adder with neat diagram.
4 Marks
(c)

Enlist various kinds of addressing modes. Explain any five of same and support your answer by taking small example.

7 Marks

Question 2

14 MarksMedium
(a)
Write sequence of microoperations to execute the following instructions:
  • AND
  • STA
3 Marks
(b)
Write assembly language program to subtract two numbers.
4 Marks
(c)

Write two address, one address and zero address instructions program for the following arithmetic expression: X = (A + B) * (C – D / E) + F * G

7 Marks
OR OPTION
(c)

Assume A = + 6 and B = + 7, apply Booth algorithm for multiplying A and B. Make necessary assumptions if required.

7 Marks

Question 3

14 MarksMedium
(a)
Explain Flynn’s classification for computers in brief.
3 Marks
(b)
Draw the flowchart for first pass of assembler and explain the same in brief.
4 Marks
(c)
Elaborate CPU-IOP communication.
7 Marks
OR OPTION
(a)
Explain pipeline conflicts in brief.
3 Marks
(b)
Discuss three state bus buffers with neat diagram.
4 Marks
(c)
Write a detailed note on associative memory.
7 Marks

Question 4

14 MarksMedium
(a)
Explain DMA in brief.
3 Marks
(b)
Write a note on SIMD array processor.
4 Marks
(c)

A computer uses a memory unit with 256K words of 32 bits each. A binary instruction code is stored in one word of memory. The instruction has four parts: an indirect bit, an operation code, a register code part to specify one of 64 registers, and an address part.

1How many bits are there in operation code, the register code part and the address part?
2Draw the instruction word format and indicate the number of bits in each part.
3How many bits are there in the data and address inputs of the memory?
7 Marks
OR OPTION
(a)
Write a brief note on memory hierarchy.
3 Marks
(b)

In certain scientific computations it is necessary to perform the arithmetic operation (Ai + Bi) * (Ci + Di) with a stream of numbers. Specify pipeline configuration to carry out this task. List the contents of all registers in the pipeline for i=1 through 4.

4 Marks
(c)
Discuss microprogrammed control organization with neat diagram.
7 Marks

Question 5

14 MarksMedium
(a)

Perform A – B (subtract) operation for the following numbers using signed magnitude number format. (Write necessary assumptions if required) A = + 11 and B = -

3 Marks
(b)
Explain status bit conditions with neat diagram.
4 Marks
(c)
Discuss cache coherence problem in detail.
7 Marks
OR OPTION
(a)

Write the difference(s) between arithmetic shift left and logical shift left instruction. Support your answer with proper illustration.

3 Marks
(b)
State the differences between RISC and CISC.
4 Marks
(c)

Explain any two types of mapping procedures when considering the organization of cache memory.

7 Marks
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About this Examination Paper & Attribution

Official Gujarat Technological University (GTU) examination paper and step-by-step solutions for Computer Organization & Architecture (COA) (Summer 2023, B.E. · Computer Engineering, Sem 4). Features complete 70-mark regular & remedial examination pattern, official marking distribution across all 5 questions, and direct 1-click official PDF download.

Transcribed for student exam preparation from Gujarat Technological University official examination archives. Questions, syllabus guidelines, and curriculum marking schemes remain the intellectual property of Gujarat Technological University.

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