Gujarat Technological UniversitySummer 2025 examination

GTU 3131102 Digital System Design Summer 2025 Question Paper & PDF

B.E. · EC Engineering · Semester 3 · Subject code 3131102
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Total
70 marks
To pass
23 marks (33%)
Duration
2.5 Hours 2:30 PM – 5:00 PM
Questions
5 with internal choice
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Q.1

14 Marks
(a)
3 marks
Convert the decimal Number 250.5 to base 4 and base 8.
(b)
4 marks
State and prove DeMorgan’s Theorem.
(c)
7 marks

Minimize the following function in SOP and POS minimal form using K-Maps: F(A, B, C, D) =∑m(1, 2, 6, 7, 8, 13, 14, 15) + d(3, 5, 12)

Q.2

14 Marks
(a)
3 marks
Convert F(A,B,C) = BC+A into standard minterm form.
(b)
4 marks
Implement Ex -NOR and Ex-OR using NAND and NOR only.
(c)
7 marks
Implement the full adder & full subtractor using Multiplexer.
(c)
7 marks
Design and implement binary to Excess-3 code converter.

Q.3

14 Marks
(a)
3 marks
Obtain the truth table of the function: F = xy+yz+zx.
(b)
4 marks
Obtain JK flip-flop from SR flip-flop.
(c)
7 marks

Draw the circuit diagrams and truth table of SR, D, T and JK flip flops.

(a)
3 marks
What is “Lock out” condition in counter? How to avoid it?
(b)
4 marks
Implement 4x16 decoder using two 3x8 decoder.
(c)
7 marks
Explain Master Slave JK flip-flop with truth table and circuit diagram.

Q.4

14 Marks
(a)
3 marks
Compare sequential and combinational circuits.
(b)
4 marks
Define the following characteristics of IC:
i)Propagation Delay
ii)Figure of Merit
iii)Fan out
vi)Noise Margin
(c)
7 marks
Compare ROM, PLA and PAL.
(a)
3 marks
Compare Latch and a Flip flop.
(b)
4 marks
Give classification of logic families and compare CMOS and TTL.
(c)
7 marks
Explain Moore machine.

Q.5

14 Marks
(a)
3 marks
List the steps in VLSI Design flow.
(b)
4 marks
Design Modulo-8 counter using T flip flop.
(c)
7 marks
With neat sketch design 4-bit bidirectional shift register.
(a)
3 marks
Define State Table and State Diagram.
(b)
4 marks
Design mod-6 asynchronous counter using T flip-flop.
(c)
7 marks
Design 4-bit ripple counter using negative edge triggered JK flip flop.

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About this paper

Official Gujarat Technological University (GTU) examination paper for Digital System Design (Summer 2025, B.E. · EC Engineering, Sem 3). Features complete 70-mark regular & remedial examination pattern, official marking distribution across all 5 questions, and direct 1-click official PDF download.

Transcribed for student exam preparation from Gujarat Technological University official examination archives. Questions, syllabus guidelines, and curriculum marking schemes remain the intellectual property of Gujarat Technological University.

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