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Gujarat Technological UniversityWinter 2025 Examination

GTU 3110016 Basic Electronics (BE) Winter 2025 Paper Solution & PDF

B.E. · Common Engineering · Semester 1 · Subject Code: 3110016
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Total Marks70 MarksExternal theory exam
Passing Marks23 Marks33% minimum cutoff
Exam Duration2.5 Hours2:30 PM – 5:00 PM
Paper Structure5 QuestionsWith internal OR choices
Jump toQ1Q2Q3Q4Q5

Question 1

14 MarksMedium
(a)
Draw the vi characteristics for ideal diode and real diode.
3 Marks
(b)
Explain the forward and reverse bias of PN junction.
4 Marks
(c)

Discuss the operation of full bridge rectifier circuits with voltage and current waveforms.

7 Marks

Question 2

14 MarksMedium
(a)
Draw the circuits for clipping the voltage waveforms.
3 Marks
(b)
Explain the characteristics of Zener diode.
4 Marks
(c)
Write short not on bipolar junction transistor (BJT).
7 Marks
OR OPTION
(c)

Explain the operation of transistor as amplifier in Common Emitter(CE) configuration.

7 Marks

Question 3

14 MarksMedium
(a)
Write key factors to achieve faithful amplifications.
3 Marks
(b)
Discuss the importances of operating points in transistor.
4 Marks
(c)
Discuss the load line analysis of transistor.
7 Marks
OR OPTION
(a)
What is a stability factor?
3 Marks
(b)
Explain the voltage divider biasing.
4 Marks
(c)
Discuss the construction and operation of Schottky diode.
7 Marks

Question 4

14 MarksMedium
(a)

What are the roles of coupling capacitor and bypass capacitor in amplifier circuits?

3 Marks
(b)
Discuss the operation of common collector circuits analysis.
4 Marks
(c)
Shows parametric comparisons between of CE, CB and CC.
7 Marks
OR OPTION
(a)
Draw the circuits of seven segment LED display.
3 Marks
(b)
What are the differences between FET and BJT?
4 Marks
(c)
Write short note on MOSFET.
7 Marks

Question 5

14 MarksMedium
(a)
Prepare the truth table for three basic logic gates.
3 Marks
(b)
Explain the working principle of a field effect transistor (FET).
4 Marks
(c)
Discuss the resistor transistor logic (RTL)circuits for basic gates.
7 Marks
OR OPTION
(a)
Draw the circuit diagram of OR gate with diodes.
3 Marks
(b)
Show the implementation of OR gate logic with use of NAND gate.
4 Marks
(c)
Discuss the applications of EX-OR and EX-NOR gate with truth tables.
7 Marks
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About this Examination Paper & Attribution

Official Gujarat Technological University (GTU) examination paper and step-by-step solutions for Basic Electronics (BE) (Winter 2025, B.E. · Common Engineering, Sem 1). Features complete 70-mark regular & remedial examination pattern, official marking distribution across all 5 questions, and direct 1-click official PDF download.

Transcribed for student exam preparation from Gujarat Technological University official examination archives. Questions, syllabus guidelines, and curriculum marking schemes remain the intellectual property of Gujarat Technological University.

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